Quantum Progress 2026: IBM, Google, Microsoft, IonQ Fault-Tolerance Roadmaps

The IBM Nighthawk and Google Willow announcements attracted more executive-level attention than any quantum hardware development in years. Both results are genuine progress. Neither changes the 2033–2035 Q-Day central estimate that security planners rely on for migration scheduling. For a detailed treatment of those two announcements specifically, see the earlier analysis at Quantum Computing Progress 2026: IBM and Google. This article widens the frame to four architecturally distinct approaches, IBM and Google on superconducting qubits, Microsoft on topological qubits, IonQ on trapped-ion qubits, and frames the comparison around the metric that actually matters: progress toward fault-tolerant logical qubits.

Why Fault Tolerance Is the Threshold That Matters, Not Qubit Count

Raw qubit count is the most-cited and least-useful metric for assessing quantum computing progress. A fault-tolerant quantum computer is defined operationally as one in which increasing the size of the error correction code reduces the logical error rate, and the reduction is sufficient to execute deep circuits, millions of two-qubit gates, reliably. No current system meets this definition. But progress toward it is the correct metric for assessing proximity to cryptographic relevance.

Breaking RSA-2048 using Shor's algorithm would require millions of physical qubits error-corrected to produce thousands of high-fidelity logical qubits operating over billions of gate operations. Gidney and Ekerå's 2021 analysis puts the physical qubit requirement at approximately 20 million under current error rate assumptions. Every hardware announcement in 2024–2026 should be evaluated against that reference, not against each other's qubit counts in isolation. The four architectures described below take different routes toward fault tolerance; comparing them on qubit count alone is like comparing a passenger ferry and a container ship on the basis of passenger cabin count.

For a detailed account of what current NISQ systems can and cannot do beyond these fault-tolerance metrics, see quantum computing actual capabilities in 2026.

IBM: Nighthawk, Heron r2, and the 2029 Roadmap

IBM's current production processor for the IBM Quantum Network is Heron r2, a 156-qubit device with tunable couplers and a median two-qubit gate error rate of approximately 0.3% (3×10⁻³). It is IBM's highest-fidelity production processor.

Nighthawk, announced November 2025, uses 120 physical qubits with a square-lattice topology and 218 next-generation tunable couplers. The qubit count is lower than Heron r2; the advance is in circuit depth capacity. IBM's target for Nighthawk is quantum advantage, a commercially useful computation that classical hardware cannot reproduce practically, by end-2026, with an initial circuit complexity target of approximately 5,000 two-qubit gates, scaling toward 10,000 by 2027. [VERIFIED — IBM Newsroom, 12 November 2025: 120 qubits and 218 tunable couplers confirmed]

Alongside Nighthawk, IBM announced Loon: an experimental processor demonstrating all hardware components required for fault-tolerant quantum computing assembled on a single chip. Loon does not operate at commercially useful scale. Its function is to validate the component integration that scaled processors will use, a proof-of-concept for the architecture, not a production system.

The IBM roadmap beyond these two is the most specific public hardware schedule from any developer. Kookaburra (2026) is the first module capable of storing information in quantum low-density parity-check (qLDPC) memory and processing it with an attached logical processing unit. Cockatoo (2027) targets entanglement between modules. Full fault-tolerant system: 2029.

The critical path item is whether qLDPC codes achieve the error suppression rates required at scale. qLDPC codes, if they perform as theory predicts on real hardware, offer significantly lower physical-to-logical qubit overhead than surface codes. IBM's bet on qLDPC from Kookaburra onwards is the architectural distinction that separates its roadmap from Google's current approach. If qLDPC implementation does not meet fidelity targets, the 2029 date slips, this is an IBM target, not a guarantee.

Google Willow: What the Below-Threshold Result Actually Proves

Google Quantum AI announced Willow in December 2024. The chip has 105 physical qubits. The result that matters scientifically: as the team scaled the surface code from distance-3 to distance-5 to distance-7, the logical error rate decreased rather than increased. The distance-7 result was 1.43×10⁻³ per cycle. Published in Nature (Acharya et al., December 2024).

This is the "below-threshold" result. Every superconducting device before Willow had shown the inverse behaviour: adding more physical qubits to the error correction scheme increased the error rate faster than the code could suppress it, because the physical qubits themselves introduced more noise than the code removed. Willow demonstrates that this can be reversed. The physics of quantum error correction works as theory predicts on real superconducting hardware, not only in simulations. That is a genuine, significant result.

What it does not show: fault tolerance at useful scale. The distance-7 logical error rate of 1.43×10⁻³ per cycle is far above what running Shor's algorithm on RSA-2048 would require, logical error rates on the order of 10⁻¹⁰ or better over the course of the computation. The gap between Willow's current result and cryptographic relevance is an engineering challenge, not a physics obstacle. That distinction matters for honest planning: the pathway to fault tolerance is now credible in a way it was not in 2023. The pathway is still long.

Google Quantum AI communicates results-driven rather than roadmap-driven. No named multi-year roadmap at the specificity of IBM's schedule has been published as of the date of this article. [ASSUMED, verify whether any Google multi-year roadmap has been published since the Willow announcement before publication] The below-threshold result sets the stage for demonstrating sustained fault-tolerant operation at larger code distances in subsequent systems, but no public timeline equivalent to IBM's 2029 target has been announced. For the full error correction and Q-Day timeline analysis, see quantum error correction and the Q-Day timeline.

Microsoft Majorana 1: Topological Qubits and a Different Approach

Microsoft Research announced the Majorana 1 chip in February 2025. It uses topological qubits based on Majorana zero modes (MZMs), a fundamentally different physical implementation from the superconducting qubits IBM and Google use.

The theoretical advantage of topological qubits is that they encode quantum information in a non-local, topological way, making them intrinsically more resistant to local environmental noise. If this approach works at scale, it could require significantly fewer physical qubits per logical qubit than surface-code-based superconducting systems. That is the central claim and the central uncertainty.

The Majorana 1 announcement demonstrated the fabrication of a topological qubit using a semiconductor nanowire-based architecture and provided evidence of MZM formation. Microsoft published the results in Nature (Aghaee et al., February 2025). Independent assessments from the quantum computing research community have been cautious: the MZM evidence is consistent with theory, but the results require further experimental validation to confirm that topological protection is as robust as claimed and that the qubits can be operated at the fidelity levels required for fault-tolerant computing. [ASSUMED, the status of independent peer assessment as of publication date should be verified; the scientific literature on MZM validation has evolved rapidly]

Microsoft has not published a named multi-year roadmap at the specificity of IBM's schedule. Majorana 1 represents the demonstration of the physical substrate, the beginning of a hardware development programme. Microsoft's own communications frame it as such, not as a near-term competitive challenge to IBM's or Google's current qubit counts. The correct interpretation is that Microsoft is pursuing a different architectural path with potentially different scaling economics; it is too early to assess whether those economics will prove favourable.

IonQ Forte Enterprise: High Fidelity, Lower Counts

IonQ's current flagship system is the Forte Enterprise, a trapped-ion quantum computer with 35 algorithmic qubits (AQ). IonQ uses AQ to characterise useful qubit count: the number of qubits that can participate in a meaningful computation given the device's gate fidelity and connectivity, rather than the total physical qubit count. AQ35 indicates circuits with up to 35 two-qubit gates executed with meaningful fidelity.

The trapped-ion architecture trades qubit count for gate fidelity. IonQ's two-qubit gate fidelity on Forte Enterprise is approximately 99.9%, better than current superconducting systems. The trade-off is speed: a trapped-ion two-qubit gate takes on the order of hundreds of microseconds compared to tens of nanoseconds for superconducting gates. This makes trapped-ion systems well suited for shallow, high-precision circuits and for error-corrected computation at smaller scales, but less competitive for the deep, fast circuits that Shor's algorithm requires.

IonQ has not announced a named multi-year fault-tolerant roadmap at the specificity of IBM's schedule. IonQ's published roadmap focuses on AQ scaling and cloud availability. Its fault-tolerance research programme is active but has not produced a below-threshold demonstration equivalent to Google's Willow result. [ASSUMED, verify before publication]

The Four Programmes at a Glance

What This Means for Security Planning: The Harvest-Now Question

The correct interpretation of 2024–2026 hardware progress for security planners is not that Q-Day has accelerated. NCSC, NSA, and NIST have not revised the 2033–2035 central estimate upward in response to Willow, Nighthawk, or Majorana 1. No standards body has changed its deprecation schedule or migration guidance as a direct result of these announcements.

What has changed is the credibility of the estimate. Willow eliminates the argument that scalable error correction might prove physically impossible on superconducting hardware. IBM's roadmap eliminates the argument that fault-tolerant timelines lack engineering milestones. The "maybe none of these architectures will work" scepticism that some organisations have used to defer PQC migration planning no longer has scientific grounding for superconducting qubits. Four architecturally distinct programmes reaching significant milestones simultaneously reduces the risk that a single technical obstacle blocks the entire field.

Harvest-now-decrypt-later (HNDL) risk is independent of the fault-tolerance roadmap. Nation-state adversaries collecting encrypted data for future decryption are acting on the probability that Q-Day eventually arrives. Progress reports that increase the engineering credibility of that probability strengthen the HNDL risk argument, even though none of these systems can currently run Shor's algorithm. For organisations that have been deferring hybrid ML-KEM deployment because the fault-tolerance pathway seemed speculative, the 2024–2026 results have closed that deferral argument.

The immediate mitigation remains unchanged: deploy hybrid X25519+ML-KEM-768 key exchange (IETF RFC 9496) on the highest-risk data flows. That recommendation holds whether Willow reaches distance-15 next year or IBM's 2029 target slips to 2031. The HNDL risk runs on the collection timeline, not the hardware development timeline.

A second consideration that the four-vendor landscape introduces is quantum supply chain risk. Quantum computing hardware, dilution refrigerators, cryogenic control electronics, microwave components, has a limited global supplier base, with several components originating in jurisdictions with strategic interests in quantum capability. Security planners in government, defence, and critical infrastructure should note that quantum supply chain security is a distinct risk category from HNDL and is beginning to appear in ODNI and NCSC Annual Reviews in the context of advanced technology sector supply chain risk.

Quantum technologies are evolving quickly and new developments emerge regularly. This page was last updated on 17/06/2026. For the most current information, we recommend contacting us directly.